
                 Project PCB Definitions - info@yig.nl - +31-(0)40-2486161                       
	YiG Engineering - Elzentlaan 43  5615LH - Eindhoven - The Netherlands  			


# Current Date > march 26 2019
# FileName > Trls4a_RevX1
# Number of PCB's -> 50
# Lead Time > >= 3 weeks
# Number of Layers > 2
# Dimensions (outer) > 80
# PCB's per array > 73
# Material > FR4
# Material Temp. resist > regular
# Total Thickness > 1,5~1,6mm 
# Cu Inner Layers > 35u
# Cu Outer Layers > 35u
# Number of Holes -> 111
# Smallest (via) hole -> 0,4mm
# Number of Via's -> 27
# Smallest Via info > Annular Ring 8 mil
# Buried Via's > No
# Blind Via's -> No
# Min. Trace Spacing > 0,15mm
# Min. Track Width > 0,15mm
# PCB Finish -> Chem. Ni/Au
# SolderMask -> Top & Bottom
# Silkscreen > Top
# Electrical Test > Yes 
# Sides with SMD -> Top
# No of SMD pads > 143
# Outer Contour Milling > No
# Inside Milling > Yes: 4x
# Inside Mill+Plate > No
# V-Cut > No
# Slot hole Plating > No
# Edge plating > No, 0 edges
# Edge Milling > No, 0 edges

If you're in doupt, please call Marc Simons @ +31-(0)40-2486161
