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← UK Data BID/700 →
Full-duplex on-line cipher machine
- not in collection
BID/610 was an fully transistorised online/offline cipher machine,
introduced in 1962 by Plessey in Liverpool (UK).
The machine was used by British and Canadian forces and also by NATO.
It was the UK's submission for NATO evaluation TROL and was approved
on 17 April 1962 for NATO information of all classifications, including TOP SECRET [5].
The machine is also known as ALVIS.
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ALVIS could be used in two modes of operation:
(A) asynchronous - this mode was suitable
for fixed (telephone) lines and point-to-point radio links - and (B) synchronous, which
provided full Traffic Flow Security (TFS) but required the extra
BID/700 synchronizing unit to be used as well.
BID/610 was a rather large device that took up most of a full-height 19" rack.
The image on the right shows a typical BID/610 system complete with power supplies
and the optional BID/700 synchronizer (at the top).
The image was taken by Henrik Teller
at the Danish Signal Regiment Historical Collection in Fredericia (Denmark) [2].
The arrangement shown here is for full-duplex.
The machine was developed by Plessey Crypto in Liverpool (UK) for a NATO
evaluation under the name TROL, which stands for Tapeless Rotorless On-Line.
Development was started in 1960 and by 1962 the machine was ready for evaluation.
NATO accepted the machine and turned down the competing TROL offer from Philips Usfa BV.
In many respects, BID/610 can be seen as a direct competitor of the American
TSEC/KW-7 (Orestes),
although the latter did not offer Traffic Flow Security. Around 1988, NATO
replaced both systems by the much smaller BID/950 (HORA),
which was also manufactured by Plessey Crypto.
➤ More about BID/700 (VENDOR)
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BID/610 can be used in several configurations or arrangements, such as
simplex, L.L.K. simplex and full-duplex. The device is suitable for teletype
signals with a speed of 45.5, 50 or 75 baud and accepts an input data format
of 7 or 7½ bit words. Only the 5 data bits are encrypted.
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The image below was taken in a communications room of the Canadian Foreign
Office, probably in the 1960s [4]. It shows ten full-height 19" racks that
each contain a full-duplex BID/610 setup. Only the first two racks have a
BID/700 synchroniser
fitted at the top. It is likely that only these two units
were used in MODE B (sync). The other racks have blanking
panels in that position.
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- Non-synchronous operation
This is a non-synchronous mode, suitable for operation over landlines.
The key generator is filled from an internal noise source
and the fill is transmitted to the recipient. There is no
Traffic Flow Security (TFS) in this mode [A] which is also
known as start/stop mode.
- Synchronous operation
This is a synchronous mode, that allows operation over HF radio links
and provides full Traffic Flow Control (TFC).
It requires the use of an external synchronization unit, such as the
BID/700 (Vendor)
when working over HF radio, or the BAM/650 in case error detection
and correction (EDC) units are involved. In this mode, the fill is not
transmitted to the recipient, but is obtained from a one-time pad
and is entered manually at either end [A].
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BID/650/2 Power Supply Unit BID/610/22 Power Supply Unit BID/610/1 Original cipher unit BID/610/15 BID/610/1 with modified plug field BID/610/21 Cipher unit (later version) BID/610/3 Receive Drive Control Unit BID/610/23 Receive Drive Control Unit (replacement for BID/610/3) BID/610/6 Test equipment for noise generator (test every 6 months) BID/700 Synchronizer (optional) BID/720 Line isolator (filtering and level conversion) (ITL) BID/740 Replacement for BID/720 based on fiber optics BID/750 Mains filter unit (TEMPEST)
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Normal simplex arrangement
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The block diagram below shows a standard simplex BID/610 setup.
At the left are the inputs from the 7-unit input devices. At the right
is the outgoing line the uses ±80V levels. All logic works at +8/+2V
levels.
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L.L.K. simplex arrangement
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The block diagram below shows a similar setup with ±6V low-level logic,
or Low Level Keying (LLK). Note that in this case, the Control Unit (CU),
the PSU and the ITL are all different from the ones above. The BIC/740
converts the ±80V line levels to the required ±6V logic levels.
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Main Cipher Unit
BID/610/1
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The simplified block diagram below shows the operation of the
Main Cipher Unit (MCU) in MODE A. At the bottom left is the
internal noise generator that produces truely random bit pattern,
which is derived from a noise diode. To ensure that the noise
generator keeps producing purely random bit streams, the board
has to be tested every 6 months with the BID/610/6 test unit.
The noise generator is used for the initial fill (when in mode A),
and for the Alarm Test. Another crucial part of the device is the
actual key generator which is also coloured red in the diagram above.
The key generator is of the Output Feedback (OFB) principle, and is based
on two non-linear feedback shift registers (NLFSRs), known as P and Q.
In MODE A this works as follows:
The cipher text output is fed into shift register P, which has several
'taps' all under control of the combining logic and the current key fill.
The output of the combining logic is fed into shift register Q, which is
also configured by the current key fill. The output of the key combining
logic of register Q is fed into an integrator that produces the actual
KEY, which is then XOR-ed with the plaintext to obtain the
ciphertext. The combining logic is extremely complex and was modified
several times during the life cycle of the BID/610 (e.g. the
BID/610/15 'alpha' modification).
In MODE B (synchronised operation), the configuration of the P and Q
registers is altered and an extra register P' is used to feed register P.
The extra register P' is also known as the Register P extension.
The output of the P combining logic is XOR-ed with the ciphertext
and fed into Q.
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Alpha modification
BID/610/15
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When the Alpha Modification was introduced (BID/610/15),
the P Register Extension – that was previously only used in mode B –
was used for mode A as well. At the same time, the length of the
P' register was extended with one extra stage. This increases the
length of the P-register from 30 to 47 stages, which no longer shares a
common factor with the 24-stage Q register.
At the same time, the number of FILL characters was extended to 16,
to ensure that the KEY generator got completely filled on initialisation.
The above changes were not applied to mode B, which kept using the
existing scheme.
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- Technical notes on BID/610, BID/700 and BAM/650, Part 1
Part of technical training course in 1975.
Secret/Confidential notebook. 1
Crypto Museum Collection #CM-301917-C [3].
- Technical notes on BID/610, BID/700 and BAM/650, Part 2
Part of technical training course in 1975.
Secret/Confidential notebook. 1
Crypto Museum Collection #CM-301918-C [3].
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Declared unclassified by the author in 1993.
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© Crypto Museum. Created: Monday 30 May 2016. Last changed: Wednesday, 15 March 2023 - 09:12 CET.
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![Photograph by Henrik Teller [2], obtained via Jerry Proc [1].](img/bid610_rack.jpg)
